/*****************************************************************************
 * Please See the declaration in the bottom of this file.
 *
 *
 * Version			Date				Comment
 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 * Init(0)			2007.08.20 
 *****************************************************************************/


#ifndef		__SM59R16A2_H__
#define		__SM59R16A2_H__

//Port 0
sfr P0	  	= 0x80;

  sbit P0_7 	= P0^7;
  sbit P0_6 	= P0^6;
  sbit P0_5 	= P0^5;
  sbit P0_4 	= P0^4;
  sbit P0_3 	= P0^3;
  sbit P0_2 	= P0^2;
  sbit P0_1 	= P0^1;
  sbit P0_0 	= P0^0;


//Stack Pointer
sfr SP		= 0x81;

//Data Pointer 0 low byte
sfr DPL		= 0x82;

//Data Pointer 0 high byte
sfr DPH		= 0x83;

//Data Pointer 1 low byte
sfr DPL1	= 0x84;

//Data Pointer 1 high byte
sfr DPH1	= 0x85;

//Power Control
sfr PCON	= 0x87;

//Timer/Counter Control
sfr TCON	= 0x88;

  sbit TCON_TF1	= TCON^7;
  sbit TCON_TR1	= TCON^6;
  sbit TCON_TF0	= TCON^5;
  sbit TCON_TR0	= TCON^4;
  sbit TCON_IE1	= TCON^3;
  sbit TCON_IT1	= TCON^2;
  sbit TCON_IE0	= TCON^1;
  sbit TCON_IT0	= TCON^0;


//Timer Mode Control
sfr TMOD	= 0x89;

//Timer 0, low byte
sfr TL0   	= 0x8A;

//Timer 1, low byte
sfr TL1   	= 0x8B;

//Timer 0, high byte
sfr TH0   	= 0x8C;

//Timer 1, high byte
sfr TH1   	= 0x8D;

//Interface control register
sfr IFCON   	= 0x8F;

//Port 1
sfr  P1		= 0x90;

  sbit P1_7	= P1^7;
  sbit P1_6	= P1^6;
  sbit P1_5	= P1^5;
  sbit P1_4	= P1^4;
  sbit P1_3	= P1^3;
  sbit P1_2	= P1^2;
  sbit P1_1	= P1^1;
  sbit P1_0	= P1^0;


//Port 5
sfr P5 		= 0x91;	

//Data Pointer select Register
sfr DPS 	= 0x92;

//Keyboard level selector register
sfr KBLS 	= 0x93;

//Keyboard input enable register
sfr KBE 	= 0x94;

//Keyboard interrupt flag register
sfr KBF 	= 0x95;

//Serial Port 0, Control Register
sfr  S0CON  	= 0x98;

  sbit S0CON_SM0	= S0CON^7;
  sbit S0CON_SM1	= S0CON^6;
  sbit S0CON_SM20	= S0CON^5;
  sbit S0CON_REN0	= S0CON^4;
  sbit S0CON_TB80	= S0CON^3;
  sbit S0CON_RB80	= S0CON^2;
  sbit S0CON_TI0	= S0CON^1;
  sbit S0CON_RI0	= S0CON^0;


//Serial Port 0, Data Buffer
sfr S0BUF	= 0x99;

//Interrupt Enable Register 2
sfr IEN2	= 0x9A;

//Serial Port 1, Control Register
sfr S1CON	= 0x9B;

//Serial Port 1, Data Buffer
sfr S1BUF	= 0x9C;

//Serial Port 1, Reload Register, low byte
sfr S1RELL	= 0x9D;

//Port 2
sfr  P2		= 0xA0;	

  sbit P2_7	= P2^7;
  sbit P2_6	= P2^6;
  sbit P2_5	= P2^5;
  sbit P2_4	= P2^4;
  sbit P2_3	= P2^3;
  sbit P2_2	= P2^2;
  sbit P2_1	= P2^1;
  sbit P2_0	= P2^0;


//Interrupt Enable Register 0
sfr  IEN0	= 0xA8;

  sbit IEN0_EA	= IEN0^7;
  sbit IEN0_ET2	= IEN0^5;
  sbit IEN0_ES0	= IEN0^4;
  sbit IEN0_ET1	= IEN0^3;
  sbit IEN0_EX1	= IEN0^2;
  sbit IEN0_ET0	= IEN0^1;
  sbit IEN0_EX0	= IEN0^0;


//Interrupt Priority Register 0
sfr IP0		= 0xA9;

//Serial Port 0, Reload Register, low byte
sfr S0RELL 	= 0xAA;

//ADC control register 1
sfr ADCC1 	= 0xAB;

//ADC control register 2
sfr ADCC2 	= 0xAC;

//ADC high data byte
sfr ADCDH 	= 0xAD;

//ADC low data byte
sfr ADCDL 	= 0xAE;

//Clock range register
sfr CLKR  	= 0xAF;

//Port 3
sfr P3		= 0xB0;

  sbit P3_7	= P3^7;
  sbit P3_6	= P3^6;
  sbit P3_5	= P3^5;
  sbit P3_4	= P3^4;
  sbit P3_3	= P3^3;
  sbit P3_2	= P3^2;
  sbit P3_1	= P3^1;
  sbit P3_0	= P3^0;


//PWM channel 2 data high byte
sfr PWMD2H	= 0xB1;

//PWM channel 2 data low byte
sfr PWMD2L	= 0xB2;	

//PWM channel 3 data high byte
sfr PWMD3H	= 0xB3;	

//PWM channel 3 data low byte
sfr PWMD3L	= 0xB4;	

//PWM control register
sfr PWMC	= 0xB5;

//Watchdog timer control register
sfr WDTC	= 0xB6;

//Watchdog timer refresh key
sfr WDTK	= 0xB7;

//Interrupt Enable Register 1
sfr  IEN1	= 0xB8;

  sbit IEN1_EXEN2	= IEN1^7;
  sbit IEN1_IEIIC	= IEN1^5;
  sbit IEN1_IEKBI	= IEN1^3;
  sbit IEN1_IEADC	= IEN1^2;
  sbit IEN1_IESPI	= IEN1^1;


//Interrupt Priority Register 1
sfr IP1		= 0xB9;

//Serial Port 0, Reload Register, high byte
sfr S0RELH	= 0xBA;

//Serial Port 1, Reload Register, high byte
sfr S1RELH	= 0xBB;	

//PWM channel 0 data high byte
sfr PWMD0H	= 0xBC;	

//PWM channel 0 data low byte
sfr PWMD0L	= 0xBD;	

//PWM channel 1 data high byte
sfr PWMD1H	= 0xBE;	

//PWM channel 1 data low byte
sfr PWMD1L	= 0xBF;

//Interrupt Request Control Register
sfr IRCON	= 0xC0;

//Compare/Capture Enable Register
sfr CCEN	= 0xC1;	

//Compare/Capture Register 1, low byte
sfr CCL1	= 0xC2;	

//Compare/Capture Register 1, high byte
sfr CCH1	= 0xC3;	

//Compare/Capture Register 2, low byte
sfr CCL2	= 0xC4;	

//Compare/Capture Register 2, high byte
sfr CCH2	= 0xC5;	

//Compare/Capture Register 3, low byte
sfr CCL3	= 0xC6;	

//Compare/Capture Register 3, high byte
sfr CCH3	= 0xC7;

//Timer 2 Control
sfr  T2CON  	= 0xC8;
 
  sbit T2CON_T2PS	= T2CON^7;
  sbit T2CON_CC0FR	= T2CON^6;
  sbit T2CON_T2R1	= T2CON^4;
  sbit T2CON_T2R0	= T2CON^3;
  sbit T2CON_T2CM	= T2CON^2;
  sbit T2CON_T2I1	= T2CON^1;
  sbit T2CON_T2I0	= T2CON^0;


//Compare/Reload/Capture Register, low byte
sfr CRCL	= 0xCA;

//Compare/Reload/Capture Register, high byte
sfr CRCH	= 0xCB;	

//Timer 2, low byte
sfr TL2		= 0xCC;

//Timer 2, high byte
sfr TH2		= 0xCD;

//Program status word
sfr  PSW	= 0xD0;

  sbit PSW_CY	= PSW^7;
  sbit PSW_AC	= PSW^6;
  sbit PSW_F0	= PSW^5;
  sbit PSW_RS1	= PSW^4;
  sbit PSW_RS0	= PSW^3;
  sbit PSW_OV	= PSW^2;
  sbit PSW_1	= PSW^1;
  sbit PSW_P	= PSW^0;


//Baud rate generator switch
sfr BRGS	= 0xD8;

sbit BRGS_BRS	= BRGS^7;

//Accumulator
sfr ACC		= 0xE0;

//Port 4
sfr  P4		= 0xE8;

  sbit P4_7	= P4^7;
  sbit P4_6	= P4^6;
  sbit P4_5	= P4^5;
  sbit P4_4	= P4^4;
  sbit P4_3	= P4^3;
  sbit P4_2	= P4^2;
  sbit P4_1	= P4^1;
  sbit P4_0	= P4^0;


//Multiplication/Division Register 0
sfr MD0		= 0xE9;

//Multiplication/Division Register 1
sfr MD1		= 0xEA;

//Multiplication/Division Register 2
sfr MD2		= 0xEB;

//Multiplication/Division Register 3
sfr MD3		= 0xEC;

//Multiplication/Division Register 4
sfr MD4		= 0xED;       

//Multiplication/Division Register 5
sfr MD5		= 0xEE;

//Arithmetic Control register
sfr ARCON	= 0xEF;

//B register
sfr B		= 0xF0;

//SPI control register 1
sfr SPIC1	= 0xF1;	

//SPI control register 2
sfr SPIC2	= 0xF2;

//SPI transmit data buffer
sfr SPITXD	= 0xF3;

//SPI receive data buffer
sfr SPIRXD	= 0xF4;

//SPI status register
sfr SPIS	= 0xF5;

//IIC status register
sfr IICS	= 0xF8;

  sbit IICS_MStart	= IICS^7;	
  sbit IICS_RXIF	= IICS^6;
  sbit IICS_TXIF	= IICS^5;
  sbit IICS_RDR		= IICS^4;
  sbit IICS_TDR		= IICS^3;
  sbit IICS_RXAK	= IICS^2;
  sbit IICS_TXAK	= IICS^1;
  sbit IICS_RW		= IICS^0;


//IIC control register
sfr IICCTL	= 0xF9;

//IIC Address 1 register
sfr IICA1	= 0xFA;	

//IIC Address 2 register
sfr IICA2	= 0xFB;

//IIC Read/Write register
sfr IICRWD	= 0xFC;
       


#endif


/*****************************************************************************
 * Processor:	SM59R16A2
 * Compiler:	Keil C 2.0
 *
 * Company:	SyncMOS Technologies International,Inc.
 * Author:	Stanley Huang
 *~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 * Board:	
 * Purpose:
 *
 *
 *****************************************************************************/
 
